Digital Design Verification Engineer

Beschreibung

Deine Rolle im Team FPGA design, implementation and definition of constraints for the space sector. Definition and development of simulation tools for verification. Definition of requirements and tracing. Functional check of pre and post layout (definition of verification plan, testbench coding, test execution and report drafting). Design documentation according to internal and normative standards. Formal verification of FPGA designs (timing analysis, code coverage, coding rule check). Unsere Erwartungen an dich Ausbildung Completed degree in electrical engineering, communications engineering, technical computer science or a comparable field of study. Qualifikationen Knowledge of VHDL and/ or Verilog. Knowledge in Scripting language like Tcl or Python. Very good English skills, German is an advantage. Interdisciplinary mindset and team spirit. Erfahrung FPGA design or verification experience is an advantage. Experience in design and simulation tools Mentor as Model Sim or HDL Author preferred. Benefits Mehr Netto 💵 Bonuszahlungen 👷‍♂️ Zusatzversicherung 🏝️ Urlaubs- und Weihnachtsgeld Gesundheit, Fitness & Fun 👩‍⚕️ Betriebsarzt 🏋🏿‍♂️ Fitness Angebote 🎳 Team Events 🙂 Gesundheitsförderung 🚲 Jobrad Work-Life-Integration 🏖️ Workation 🍼 Kinderbetreuung ⏰ Flexible Arbeitszeiten 🏠 Home Office Metadaten Level: Erfahren Job Feld: Embedded Anstellung: Vollzeit Vertragsart: Unbefristetes Dienstverhältnis Arbeitsmodell: Hybrid, Onsite Unternehmenstyp: Recruiting Agentur Branche: Personaldienstleistung Ort: München | Deutschland

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